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SAM.govNotice fcad963625ca4b36b09c834176fbc194

CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates

Country
United States
Published
February 24, 2026
Deadline
March 9, 2026

Description

{"description":" Amendment 0001: \n\n Amendment changes include the following: \n\n \n\t The required response date is extended from February 26, 2026 to March 9, 2026 \n\t No Statement of work change \n\t Questions and Answers: \n \n\n Question1: Is there a cleanroom specification? \n\n NIST Response: No. The instrument will be installed in a general purpose lab in the advanced measurement laboratory facility, but not within a cleanroom. \n\n \n\n Question 2: Are you flexible on the footprint (size/dimension) \n\n NIST Response: N IST expects the analytical instrument (source, stages, detectors, and shielded enclosure) to fit within the footprint specified by 10.2. Additional space is available in the lab around the instrument for service access, and for support equipment (including chase space for air compressor/dryer if required, and a work area in the lab for control and analysis PCs). \n\n \n\n Question 3: Are the devices in JEDEC Trays? \n\n NIST Response: Typically no. NIST requires significant flexibility to load samples that are within the size envelope described by specification 5. Samples will include full wafers, coupons (partial wafers), individual or groups of packaged devices, as well as atypical sample geometries. To meet requirement 5.1, vendors must include 5 sample carriers that are compatible with the automated loading system. Carriers supporting a JEDEC tray is only one possible way to meet that requirement. \n\n \n\n See Combined Synopsis Solicitation_1333ND26QNB030031, Attachment 1 - Statement of Work, and Attachment 2 - Applicable Provisions and Clauses attachments for solicitation details. \n"} Solicitation Number: 1333ND26QNB030031 Type: Combined Synopsis/Solicitation Base Type: Combined Synopsis/Solicitation NAICS: 334413 Classification Code: 6640 Response Deadline: 2026-03-09T11:00:00-04:00 Office Address: GAITHERSBURG, MD Place of Performance: Gaithersburg, Maryland, 20899 POC: Tracy Retterer, Tracy.retterer@nist.gov POC: Donald Collie, donald.collie@nist.gov {"description":" Amendment 0001: \n\n Amendment changes include the following: \n\n \n\t The required response date is extended from February 26, 2026 to March 9, 2026 \n\t No Statement of work change \n\t Questions and Answers: \n \n\n Question1: Is there a cleanroom specification? \n\n NIST Response: No. The instrument will be installed in a general purpose lab in the advanced measurement laboratory facility, but not within a cleanroom. \n\n \n\n Question 2: Are you flexible on the footprint (size/dimension) \n\n NIST Response: N IST expects the analytical instrument (source, stages, detectors, and shielded enclosure) to fit within the footprint specified by 10.2. Additional space is available in the lab around the instrument for service access, and for support equipment (including chase space for air compressor/dryer if required, and a work area in the lab for control and analysis PCs). \n\n \n\n Question 3: Are the devices in JEDEC Trays? \n\n NIST Response: Typically no. NIST requires significant flexibility to load samples that are within the size envelope described by specification 5. Samples will include full wafers, coupons (partial wafers), individual or groups of packaged devices, as well as atypical sample geometries. To meet requirement 5.1, vendors must include 5 sample carriers that are compatible with the automated loading system. Carriers supporting a JEDEC tray is only one possible way to meet that requirement. \n\n \n\n See Combined Synopsis Solicitation_1333ND26QNB030031, Attachment 1 - Statement of Work, and Attachment 2 - Applicable Provisions and Clauses attachments for solicitation details. \n"}

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CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates tender | Tenqual